The invention relates to an amplifier arrangement comprising an inverting transconductance stage having an input and an output; a capacitor coupled between the input and the output of the inverting transconductance stage; and signal current means having a first output coupled to the input of the inverting transconductance stage to provide a first signal current to the input of the inverting transconductance stage.
Such an amplifier arrangement is known, for example, from a paper by P. R. Gray et al., "MOS Operational Amplifier Design--A Tutorial Overview", IEEE Journal of Solid State Circuits, Vol. SC-17, No. 6, Dec. 1982, pp. 969-982. A very well known and widespread frequency-compensation method for amplifiers is Miller compensation or pole splitting, as shown in FIG. 1. Placing a Miller capacitor 2 between the input 4 and the output 6 of an inverting transconductance stage 8 splits the input and output poles caused by the capacitances 10 and 12 at the input 4 and the output 6, resulting in a well-controlled 20 dB/decade frequency roll-off. The transconductance stage 8 is driven by a signal source 14 having an output 16 coupled to the input 4 to supply a signal current I.sub.in to the transconductance stage. FIG. 2 shows a simple Miller-compensated amplifier in which the inverting transconductance stage 8 is formed by a transistor M1 and the signal source 14 by a differential transistor pair M2-M3. A disadvantage of the Miller technique is the zero appearing in the right-half of the s-plane of the complex transfer function of the amplifier arrangement. This Right Half-Plane (RHP) zero severely degrades the phase margin of the amplifier. The zero is caused by the direct path the Miller capacitor 2 creates from the input 4 to the output 6. Signal current taking this path is in phase opposition to the output current of the inverting transconductance stage 8. It can easily be understood that this opposite phase current reduces the bandwidth in a feedback system because the sign of the feedback changes from negative to positive for high frequencies. The position of the RHP zero is z=g.sub.m /C.sub.m, where g.sub.m is the transconductance of the inverting transconductance stage 8 and C.sub.m the capacitance of the Miller capacitor 2. As the expression for the zero reveals, the influence of the RHP zero is inversely proportional to the transconductance g.sub.m of the inverting transconductance stage 8. Both bipolar and MOS circuits suffer from the effects of the RHP zero. Since MOS transistors normally have a lower transconductance than bipolar transistors MOS circuits are most strongly affected. In many cases the RHP zero determines the maximum bandwidth of a MOS amplifier. However, the RHP zero can also be a bandwidth limiting factor in bipolar designs.
In the past some measures to counteract the RHP zero have been proposed. A classic solution, also known from the afore-mentioned paper, is to insert a small resistor 16 in series with the Miller capacitor 2, as is shown in FIG. 3. Increasing the value R.sub.m of the resistor 16 shifts the RHP zero towards infinity. As the resistor value increases even more the zero will reappear in the Left Half-Plane. No zero will be present when R.sub.m =1/g.sub.m. As the optimum value R.sub.m of the compensation resistor 16 depends on the transconductance g.sub.m problems arise when the transconductance is not constant, for example, when the current through the transistor M1 has a large dynamic range. This is likely to occur in an output stage. In this situation the compensation can only be optimised for one value of the output current of the inverting transconductance stage, for example for the quiescent current. For all other output currents the compensation is suboptimal. Since the bandwidth of an amplifier depends on the worst-case position of the RHP zero not much bandwidth improvement can be expected from the compensation resistor 16.
Other propositions to eliminate the RHP zero are based on removing the direct path through the Miller capacitor 2. By inserting a unilateral element in the Miller capacitor branch direct feed-through is suppressed. FIG. 4 shows an implementation with a current buffer known from a paper by B. K. Ahuja, "An Improved Frequency Compensation Technique for CMOS Operational Amplifiers", IEEE Journal of Solid-State Circuits, Vol. SC-18, No. 6, Dec. 1983, pp. 629-633. A common gate transistor M.sub.m in series with a Miller capacitor 2 serves as the current buffer. A disadvantage of this approach is the addition of an active element, with its associated poles, in the Miller feedback path. These poles deteriorate the high frequency performance and the remedy is worse than the disease.